SK hynix Shows Memory-Centric AI Rack
- •At OCP Global Summit 2026, SK hynix unveiled next-generation memory products and a memory-centric AI rack.
- •Its CXL 3.2-based 256GB CMM-DDR5 offers 80GB/s bandwidth, more than twice that of the previous generation.
- •MARS demos showed KV cache sharing and reuse to support long-context inference and improve memory efficiency.
SK hynix took part in OCP Global Summit 2026, held from the 12th to the 15th in San Jose, California, and unveiled next-generation memory solutions and a memory-centric AI server system. The conference, where data center hardware designs and specifications are shared and standardized, featured AI infrastructure as a major topic. SK hynix demonstrated solutions in development at the system level.
The company introduced its second-generation, 256GB CMM-DDR5 product based on CXL 3.2. CXL is an interface standard that connects CPUs and GPUs with memory. The product supports a memory pool that multiple servers can draw from as needed. Its bandwidth is 80GB/s, more than twice that of the previous generation, while energy efficiency improved by about 30%. It also includes CXL Pooled functionality, which SK hynix aims to use to ease bottlenecks in data-intensive, high-load environments. Since signing a business agreement with NAVER Cloud in September last year, SK hynix has continued joint work to reduce bottlenecks in cloud AI services using CXL memory. At the summit, it shared proof-of-concept results for KV cache sharing in agentic AI environments and embedding sharing for the omn modality service OmniServe.
MARS (Memory Centric AI Rack System), which SK hynix exhibited, combines solutions from multiple partners in a single rack, with memory at its center. In demos with Arcee, Liqid and Marvell, CXL pooled memory connected multiple servers and GPUs so they could transfer or reuse KV caches. SK hynix said this approach improved system performance compared with existing methods that use network communications. A separate demo with AMD, Penguin, Xcena and Arcee showed a memory rack storing and reusing large KV caches with CXL and hybrid memory. The system predicted which KV caches would be needed based on prior conversations and task histories, brought them into DRAM in advance for processing, and stored the full cache on SSD, demonstrating fast reads alongside high-capacity storage. With personal AI agent company Pickle, SK hynix demonstrated pooled-memory streaming that accelerated data transfers among multiple AI models to deliver results to users faster.
CMM-Ax is a solution that performs computations directly in memory to reduce data movement. In its “Efficient Long Context LLM Serving” demo, SK hynix showed how the product could efficiently accelerate long contexts that existing GPU-based systems struggle to process. Related research was accepted at the MICRO 2026 computer architecture conference.
The memory product display included eSSDs and server DRAM. The eSSD lineup included the high-performance PS1010 U.2, the PS1110 E3.S under development, high-capacity PS1101 E3.S, and liquid-cooling-compatible PEB210 E1.S and PEB210 M.2 2280. Server DRAM products on display included 256GB 3DS RDIMMs; 96GB and 64GB DDR5 RDIMMs; 128GB DDR5 MRDIMMs; and 192GB SOCAMM2, designed for improved power and space efficiency.
The HBM display featured a model of NVIDIA’s Vera Rubin superchip, alongside HBM4 and SOCAMM2 modules that visitors could fit into a server model. Physical HBM4E, HBM4 and HBM3 products were arranged by generation, and the company presented TSV and advanced MR-MUF technologies. HBF is a high-bandwidth NAND solution using the same TSV technology as HBM. The display materials presented HBM’s processing speed for environments requiring fast responses and HBF’s capacity when providing large memory to many users. SK hynix also outlined its technology development since creating the world’s first HBM in 2013.
In an executive session on the first day, Vice President Ho-sik Kim said the growth of generative AI and hyperscale data centers had left the traditional CPU- and GPU-centered architecture facing memory bottlenecks and rising power consumption. He proposed memory-centric AI rack systems as a solution. Kim said rack-level memory pooling using next-generation CXL technology and dynamic zero-copy data sharing could speed data movement for high-load workloads. He added that the architecture could support KV cache reuse in collaborative agentic AI, faster responses in personal multimodal services, and solutions to irregular memory access in large-scale GNN training.
A panel discussion on the third day addressed software framework and API integration among PIM and PNM companies, the importance of frameworks linking customers with products, and the need for standardization. Presentations by technical staff that day described how shared memory for tokens and KV caches, along with offloading tokenization and cache data analysis to memory, could improve agentic AI service performance. Professor Kiwan Maeng of Pennsylvania State University and TL Young-hoon Min presented a system architecture using compute-capable memory to reduce the extra computation and data movement required for differential privacy training, improving training speed and energy efficiency. TL Juhee Lee presented LLM serving that uses storage